Day 24
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253
days/day24.st
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253
days/day24.st
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Object subclass: Gate [
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| name classif |
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name: nm [name := nm]
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name [^name]
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printOn: st [ st << self class << ' ' << name ]
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eval: cq [self subclassResponsibility]
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inputs [^nil]
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opnm [self subclassResponsibility]
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visualize: st
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[st << name << '[label="' << name << ' ' << self opnm.
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classif ifNotNil: [:c | st << ' (' << c << ')'].
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st << '"];']
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classif: c [classif := c]
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classif [^classif]
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isInput [^false]
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]
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Gate subclass: InputGate [
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isInput [^true]
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]
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InputGate subclass: OneGate [opnm [^$1] eval: cq [^true]]
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InputGate subclass: ZeroGate [opnm [^$0] eval: cq [^false]]
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Gate subclass: LogicGate [
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| lhs rhs cache |
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lhs: l rhs: r [lhs := l. rhs := r]
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eval: cq [^cache ifNil: [cache := self doEval: (cq eval: lhs) and: (cq eval: rhs)]]
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doEval: lv and: rv [self subclassResponsibility]
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printOn: st [ st << self class << $( << name << ': ' << lhs << ', ' << rhs << $) ]
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inputs [^{lhs . rhs}]
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visualize: st
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[super visualize: st.
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st << lhs << '->' << name << ';'.
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st << rhs << '->' << name << ';']
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]
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LogicGate subclass: AndGate [opnm [^$&] doEval: lv and: rv [^lv & rv]]
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LogicGate subclass: OrGate [opnm [^$|] doEval: lv and: rv [^lv | rv]]
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LogicGate subclass: XorGate [opnm [^$^] doEval: lv and: rv [^lv xor: rv]]
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Object subclass: Circuit [
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| gates forwardMap swaps locked classMap |
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initialize
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[ gates := LookupTable new.
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swaps := Set new.
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locked := Bag new. ]
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gates [^gates]
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at: nm put: gate [^gates at: nm put: (gate name: nm)]
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at: nm [^gates at: nm]
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eval: nm [^(gates at: nm) eval: self]
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parseInits: inits logic: logic
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[ | optbl |
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optbl := LookupTable new.
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optbl at: 'AND' put: AndGate;
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at: 'OR' put: OrGate;
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at: 'XOR' put: XorGate.
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inits lines do: [
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:ln | ln scanf: '%[^:]: %d'
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with: [
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:nm :v |
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self at: nm put:
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(v = 1 ifTrue: [OneGate] ifFalse: [ZeroGate])
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new]].
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logic lines do: [
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:ln | ln scanf: '%s %s %s -> %s'
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with: [
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:g1 :op :g2 :nm |
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self at: nm put: ((optbl at: op) new lhs: g1 rhs: g2)]]]
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gateAssocs
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[ | ord | ord := SortedCollection new.
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gates keysAndValuesDo: [:nm :g | ord add: (nm -> g)].
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^ord asArray ]
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printOn: st
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[ st << self class << $(; nl.
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self gateAssocs do: [:ass | st tab; << ass value; nl].
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st << $) ]
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visualize
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[ AOC visualizeWithExt: '.dot' do: [
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:st |
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st << 'digraph {'.
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self gateAssocs do: [:ass | ass value visualize: st].
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st << '}'; nl] ]
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swap: nm1 and: nm2
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[ | tmp key undoing |
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key := {nm1. nm2} sort.
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(swaps includes: key) ifTrue: [
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swaps remove: key.
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locked removeAll: {nm1 . nm2}.
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] ifFalse: [
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swaps size >= 4 ifTrue: [^false].
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((locked includes: nm1) or: [locked includes: nm2])
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ifTrue: [^false].
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swaps add: key.
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locked addAll: {nm1 . nm2}.
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].
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tmp := self at: nm1.
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self at: nm1 put: (gates at: nm2).
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self at: nm2 put: tmp.
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^true ]
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try: block unwind: otherwise
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[ ^block value or: [otherwise value. false] ]
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swapped: nm1 and: nm2 do: block
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[ ^(self swap: nm1 and: nm2) and: [
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self try: block
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unwind: [self swap: nm1 and: nm2]]]
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locked: nm do: block
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[ ^self try: [locked add: nm. block value]
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unwind: [locked remove: nm] ]
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classifyGates
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[ classMap := Dictionary new.
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gates do: [
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:g | | k |
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k := self classify: g.
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g classif: k.
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classMap at: k inA: Set add: g ] ]
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classify: g
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[ | halfGate |
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"half adder:
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- I, I -> H&, H^
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- C' = H^ ; O = H&"
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"full adder:
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- H^, C -> F&, F^
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- F| <- H&, F&
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- C' = F| ; O = F&"
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g isInput ifTrue: [ ^'I' ].
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halfGate := g inputs allSatisfy: [:i | (self at: i) isInput].
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halfGate ifTrue: [ ^String with: $H with: g opnm ].
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^String with: $F with: g opnm ]
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withInput: nm
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[ forwardMap ifNil: [
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forwardMap := Dictionary new.
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gates do: [:g | g inputs ifNotNilDo: [
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:i | forwardMap at: i inA: Set add: g]]].
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^forwardMap at: nm ifAbsent: [#()] ]
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classifySet: set
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[ | map | map := LookupTable new.
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set do: [:elt | map at: elt classif put: elt].
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^map ]
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withInputClassify: nm [ ^self classifySet: (self withInput: nm) ]
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withInputClassify: nm1 and: nm2 mustHave: classes
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[ | cls1 cls2 |
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cls1 := self withInputClassify: nm1.
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cls2 := self withInputClassify: nm2.
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cls1 = cls2 ifFalse: [^nil].
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classes do: [:c | cls1 at: c ifAbsent: [^nil]].
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^cls1 ]
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withInputClassify: nm1 and: nm2 mustHave: classes do: block
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[ (self withInputClassify: nm1 and: nm2 mustHave: classes)
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ifNil: [^false]
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ifNotNil: [:v | ^block value: v] ]
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findFaults
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[ self classifyGates.
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(self findFaults: 0 carry: nil)
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ifFalse: [self error: 'No working swaps']
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ifTrue: [^swaps]. ]
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gate: gate mustHaveName: nm do: block
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[ ^(gate name = nm)
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ifTrue: [block value]
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ifFalse: [self swapped: gate name and: nm do: block] ]
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ioName: c at: idx
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[ ^String with: c
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with: (Character digitValue: idx // 10)
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with: (Character digitValue: idx \\ 10) ]
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maybeRenameGate: gate do: nameBlock
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[ ^(self locked: gate name do: [
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nameBlock value: gate name]) or: [
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(classMap at: gate classif) anySatisfy: [
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:ogate |
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(ogate == gate) not and: [
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(locked includes: ogate name) not and: [
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self swapped: gate name and: ogate name do: [
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nameBlock value: gate name ]]]]]]
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maybeSwap: gate1 and: gate2 do: block
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[ ^block value or: [ self swapped: gate1 name and: gate2 name do: block ] ]
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findFaults: idx carry: carry
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[ | halfAdder zNN |
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"Try and find the adder which outputs zNN.
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This involves finding the half adder, then its full adder,
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ensuring the output bit is to the correct zNN, and possibly
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swapping out each output along the way."
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zNN := self ioName: $z at: idx.
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"inputs can't be wired wrong"
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halfAdder := self withInputClassify: (self ioName: $x at: idx).
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halfAdder isEmpty ifTrue: ["Done!" ^carry = zNN].
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^self maybeSwap: (halfAdder at: 'H^') and: (halfAdder at: 'H&') do: [
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carry ifNil: [
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self gate: (halfAdder at: 'H^')
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mustHaveName: zNN
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do: [
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self maybeRenameGate: (halfAdder at: 'H&') do: [
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:hAnm | self findFaults: idx + 1 carry: hAnm ]]]
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ifNotNil: [
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self maybeRenameGate: (halfAdder at: 'H^') do: [
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:hXnm |
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self withInputClassify: carry
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and: hXnm
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mustHave: #('F&' 'F^')
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do: [
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:fullAdder |
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self maybeSwap: (fullAdder at: 'F^') and: (fullAdder at: 'F&') do: [
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self gate: (fullAdder at: 'F^')
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mustHaveName: zNN
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do: [
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self maybeRenameGate: (fullAdder at: 'F&') do: [
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:fAnm |
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self maybeRenameGate: (halfAdder at: 'H&') do: [
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:hAnm |
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self withInputClassify: hAnm
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and: fAnm
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mustHave: #('F|')
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do: [
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:fullOr |
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self maybeRenameGate: (fullOr at: 'F|') do: [
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:fOnm |
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self findFaults: idx + 1 carry: fOnm ]]]]]]]]]]]
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]
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AOC input: [ stdin contents splitDoubleNl letArrayInBlock: [
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:inits :logic | Circuit new parseInits: inits logic: logic ]];
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part1: [ :cq | | outs res |
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outs := SortedCollection sortBlock: [:l :r | r <= l].
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cq gates keysAndValuesDo: [
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:nm :i | (nm startsWith: 'z') ifTrue: [outs add: nm]].
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res := 0.
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outs do: [
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:nm | | bit |
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bit := (cq eval: nm) ifTrue: [1] ifFalse: [0].
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res := (res bitShift: 1) bitOr: bit.
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].
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res ];
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part2: [ :cq | cq findFaults join sort join: ','. ];
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result: [ :cq :part | part value: cq ];
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finish.
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@ -164,6 +164,20 @@ Iterable extend [
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intoCollection: acc [ self do: [:x | acc add: x]. ^acc ]
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intoCollection: acc [ self do: [:x | acc add: x]. ^acc ]
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]
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]
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Set extend [
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flip: key
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[ (self includes: key)
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ifTrue: [self remove: key. ^true]
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ifFalse: [self add: key. ^false] ]
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]
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Iterable extend [
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findFirstElt: block
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[ self do: [:v | (block value: v) ifTrue: [^v]]. ^nil ]
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findFirstElt: block ifAbsent: abs
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[ self do: [:v | (block value: v) ifTrue: [^v]]. ^abs value ]
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]
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SequenceableCollection extend [
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SequenceableCollection extend [
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findFirstElt: block [ ^self at: (self findFirst: block) ]
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findFirstElt: block [ ^self at: (self findFirst: block) ]
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findFirstElt: block ifAbsent: abs
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findFirstElt: block ifAbsent: abs
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